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  • I/O Organization and Interrupts MCQs+PYQs | DMA | Suraku Academy

Q: 1 Which of the following modes of I/O operation keeps the processor most busy?

  1. Programmed I/O

  2. Interrupt Initiated I/O

  3. DMA

  4. None of these

[ Option A ]

Input/Output (I/O) operations allow the CPU to communicate with external devices like keyboard, disk, printer, etc. There are three main I/O techniques:
1. Programmed I/O.
2. Interrupt-driven I/O.
3. DMA (Direct Memory Access).
In Programmed I/O, the CPU repeatedly checks the device status in a loop (called polling). During this time, the CPU cannot perform other useful tasks. This wastes processor time and keeps it fully occupied.
In Interrupt-driven I/O, the CPU performs other tasks and only responds when the device sends an interrupt signal. This reduces CPU idle waiting.
In DMA, a separate DMA controller handles data transfer directly between memory and the I/O device. The CPU is involved only at the beginning and end of the transfer. Therefore, CPU usage is minimal.

Q: 2 The technique where the controller is given complete access to main memory is ____________.

  1. Cycle Stealing

  2. Memory Stealing

  3. Memory Conditioning

  4. Burst Mode

[ Option D ]

In data transfer techniques like DMA (Direct Memory Access), the controller can transfer data between I/O device and main memory without CPU intervention.
In Burst Mode, the DMA controller is given complete control of the system bus and memory for a block of data transfer. During this time:

  • CPU is temporarily halted.
  • Entire data block is transferred in one continuous operation.
ModeWorking
Cycle StealingDMA takes control for one cycle at a time.
Burst ModeDMA takes full control until transfer completes.
Memory StealingSame as cycle stealing.

Q: 3 On receiving an interrupt from an I/O device, the CPUs:

  1. Hand over the control of address and data bus to interrupting device

  2. Branch off to interrupt service subroutine immediately

  3. Branch off to interrupt service subroutine after completion of current instruction

  4. None of these

[ Option C ]

An interrupt is a signal sent by an I/O device to the CPU to request immediate attention. However, the CPU does not stop execution in the middle of an instruction. When an interrupt occurs, the CPU first completes the execution of the current instruction to maintain correctness and consistency of operations. 
After finishing the current instruction, the CPU saves the necessary information and then branches to the Interrupt Service Routine (ISR) corresponding to that interrupt. This mechanism ensures proper control flow and prevents data corruption.

Q: 4 To access the I/O devices the status flags is continuously checked in:

  1. Program Controlled I/O

  2. Memory Mapped I/O

  3. I/O Mapped

  4. None of these

[ Option A ]

In Program Controlled I/O, the CPU continuously checks the status flags of the I/O device to see whether it is ready for data transfer. This method is also called polling, where the processor keeps testing the device status until the operation is complete.

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