Computer Architecture Miscellaneous MCQs + PYQs

Introduction to Computer Organization Computer Arithmetic and ALU CPU Organization and Instruction Set (Registers, Addressing Modes) Memory Organization (Primary, Cache, Virtual) Input–Output Organization and Interrupts (DMA) Computer Architecture – Miscellaneous (RISC, CISC, Pipelining)

Q: 1 Register renaming is done in pipelined processors -

As an alternative to register allocation at compile time
For efficient access to function parameters and local variables
To handle certain kinds of hazards
As part of address translation

Show Answer

[ Option C ]

Register renaming is a technique used in modern superscalar and pipelined processors to eliminate a specific type of data hazard called WAR (Write-After-Read) and WAW (Write-After-Write) hazards. These are also known as "Name Dependencies" because they arise not from a true data dependency, but from the reuse of a limited number of architectural registers.

WAR Hazard: A later instruction tries to read an old value from a register that a previous instruction is about to overwrite.
WAW Hazard: A later instruction tries to write to a register before an earlier instruction that also writes to the same register has completed.

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