CS Free MCQ Bank

[ Option C ]

A memory unit stores data in the form of words. Each word contains a fixed number of bits. The total capacity of a memory is therefore defined as:
Memory Capacity=Number of words × Number of bits per word
To access and transfer data between the CPU and memory, two types of lines are used:

• Address lines which are used to select a specific memory word or location.
• Data lines which are used to transfer data to or from the selected memory word.

The Given Memory : 4K * 16
4K represents the number of words in memory : 4K = 4*1024 = 4096 Words.
16 represents the number of bits per word.
Each memory word must have a unique address. The number of address lines required depends on how many different addresses must be generated or number of memory locations (words).
Number of address lines = log₂(Number of Words)
=log₂(4096) = 12 or 4096=2¹²
The memory needs 12 address lines to uniquely identify all 4096 words.
Data lines are used to read or write one complete word at a time. Since each word contains 16 bits, the memory must have 16 data lines.

NOTE:

• Number of address lines = log₂(number of words).
• Number of data lines = decided by word size (bits per word).

[ Option B ]

An I/O processor is a special-purpose processor used to handle input and output operations independently of the CPU. Its main job is to manage data transfer between I/O devices and Main Memory.
By doing this, the I/O processor reduces the workload on the CPU and allows the CPU to continue executing other instructions while I/O operations are in progress.

[ Option D ]

In a Virtual Memory system, the CPU generates addresses based on its address lines, which define the virtual address space. This virtual address space represents the range of memory addresses that a program can use, and it is not limited to the size of the physical main memory (RAM).
One of the main purposes of virtual memory is to allow programs to use an address space that is larger than the available physical memory, with the extra portion being stored on secondary storage.
However, the virtual address space cannot exceed the size of the secondary storage, because secondary storage is where the non-resident pages of memory are actually stored.
Therefore, the address space specified by the CPU must be larger than the physical memory size but smaller than the secondary storage size.

• Virtual Address Space > Physical Memory (RAM).
• Virtual Address Space < Secondary Storage (HDD).

[ Option C ]

Each RAM chip is of size 32K × 1. This means, 32K locations and 1 bit per location. So, capacity of one chip is 32K*1 bit=32K bits.
Required memory capacity : 256K bytes = 256K*8 = 2048K bits
Number of chips required : 2048K bits/32K bits per chip = 64

[ Option C ]

Cache Memory is used to store frequently accessed data so that the CPU can access it faster than main memory.
In direct mapping, each block of main memory is mapped to exactly one fixed location (line) in the cache.
This fixed mapping makes the design simple and inexpensive, but it also introduces a major drawback known as the conflict problem. 
When two or more frequently accessed main memory blocks are mapped to the same cache line, they continuously replace each other in the cache. 
As a result, even though the blocks are repeatedly used, they cannot remain in the cache simultaneously. This frequent replacement reduces the cache hit ratio and degrades overall performance.

[ Option B ]

Cache Memory works effectively because of the locality of reference principle. This means that programs tend to access the same data or instructions repeatedly (Temporal Locality) or access nearby memory locations (Spatial Locality). Cache stores such frequently or recently used data, so the CPU can access it much faster than main memory.

[ Option B ]

[ Option D ]

Effective Memory Access Time (EMAT) depends on how often data is found in the cache (hit) and how often it must be fetched from main memory (miss).
Given:

• Main memory access time = 10 milliseconds
• Cache access time = 10 microseconds = 0.01 milliseconds
• Cache hit ratio = 15% = 0.15
• Miss ratio = 1-0.15 = 0.85

EMAT = (Hit Ratio*Cache Access Time) + (Miss Ratio*Main Memory Access Time)
EMAT = (0.15*0.01 ms) + (0.85*10 ms)
EMAT = 0.0015 ms + 8.5 ms
EMAT = 8.5015 ms = 1.85 milliseconds.

[ Option A ]

The CPU can directly access only one type of memory, which is the memory used to store programs and data that are currently being executed. This type of memory is called Primary Memory or Main Memory or RAM.

[ Option D ]

Address Lines in Memory

• Each memory location in a computer is assigned a unique address.
• To access these memory locations, the system uses address lines.
• The number of address lines determines how many unique locations can be addressed.
• If there are n address lines, the total number of memory locations = 2ⁿ.

Given: Memory size = 512 bytes
Number of address lines n is calculated using:
2ⁿ = Memory size in bytes
2ⁿ = 512
Since 2⁹=512, we find n=9.

[ Option B ]

The bandwidth of memory tells us how many memory accesses can be completed per second. To find this, we must first calculate the total time required for one complete memory cycle.
Given,
Access time = 45ns
Time gap before next access = 5ns
Total Cycle Time : 45ns + 5ns = 50ns
Bandwidth is the reciprocal of the cycle time: 
Bandwidth : 1 / (Access Time + Recovery Time)
Bandwidth : 1/(50*10^-9) Since : 1ns = 10^-9 seconds
Bandwidth : 1000*10⁶/50 = 20*10⁶ Hz
Bandwidth : 20 MHz

Time and Frequency Units:

• Pico, nano, micro, and milli are commonly used for time, while kilo, mega, giga, and tera are used for frequency.
• Smaller time unit means faster event.
• Larger frequency unit means higher speed.
• Time Units (Ascending Order) : ps<ns<µs<ms<s
• Frequency Units (Ascending Order) : Hz<kHz<MHz<GHz<THz

[ Option C ]

Dynamic RAM (DRAM) stores data using capacitors and needs periodic refreshing to retain data. Because of this design, DRAM consumes less power compared to Static RAM (SRAM), which uses flip-flops and consumes more power continuously. 
However, the access time of DRAM is slower than SRAM because refreshing and capacitor charging take extra time.

• The DRAM is slower, consume less power and cheaper. It is used as Main Memory.
• The SRAM is faster, consume more power and expensive. It is used in Cache.

[ Option B ]

The number of address lines tells us how many memory locations (words) can be addressed.
With a 12-bit address, the CPU can address: 2¹²=4096 words
The total memory capacity is given as 16 KB. 
16 KB = 16×1024 = 16384 bytes
Now, word length means the number of bytes per word. It can be calculated as:
Word Length = Total memory size (in bytes) / Number of words
Word Length = 16384 / 4096 = 4 bytes.