Combinational Circuits : MCQs & PYQs with Explanation

Option C

A Half Subtractor is a combinational logic circuit used to subtract one binary bit from another binary bit. It has two inputs and two outputs.

• A is Minuend, the bit from which another bit is subtracted.
• B is Subtrahend, the bit that is subtracted from A.
• D is Difference, the result of subtraction.
• B₀ is Borrow, indicates whether a borrow is required.

The basic operation is A-B.

Truth Table:

From the truth table, the Difference is 1 when the two inputs are different. This is exactly the behavior of an XOR gate.
Therefore, the Boolean expression for Difference is D=A⊕B. The XOR operation can also be written in Boolean algebra as D=A′B+AB′.
The Borrow is 1 only when A=0 and B=1. Therefore, the Boolean expression for Borrow is B₀=A′B.

Boolean Expressions:

Circuit Diagram:

Option C

A 1-of-32 decoder needs 5 input lines because 2⁵ = 32, which means 5 bits can represent 32 different output lines.
A 3-to-8 decoder uses 3 input lines and produces 8 output lines. To design a 1-of-32 decoder using 3-to-8 decoders, the 5 inputs are divided into two groups:

• 3 inputs are connected to all the 3-to-8 decoders to generate the 8 outputs.
• The remaining 2 inputs are used as enable signals to select which 3-to-8 decoder will work.

Since 2 input lines can select 2²=4 decoders, we need 4 separate 3-to-8 decoders. Each decoder produces 8 outputs, so together they produce, 4*8 = 32 outputs.
Therefore, four 3-to-8 decoders are required to build a 1-of-32 decoder.

Option C

For a multiplexer, the number of select inputs is decided by the relation,
Select Inputs=log₂(Number of Data Inputs)
An 8:1 multiplexer has 8 data inputs and only one output, which means we need enough select lines to uniquely choose one of the 8 inputs. Since log₂(8) = 3, three select inputs are required.

Option B

An encoder is a combinational circuit that converts one form of data into another coded form. A Decimal to Binary Coded Encoder converts decimal digits into binary code.
In a decimal number system, there are 10 possible digits from 0 to 9, so a decimal-to-binary encoder requires 10 input lines. 
To represent these decimal digits in binary form, 4 output lines are sufficient because 4 binary bits can represent up to 16 different combinations (2⁴ = 16), which easily covers decimal values from 0 to 9.

Option B

An 8-to-1 multiplexer selects one input out of 8 possible inputs. To uniquely select any one of these 8 inputs, we need enough select lines to represent all combinations. The number of select lines (n) required is determined using the formula 2ⁿ=8. Solving this gives n=3.

Option B

A Multiplexer (MUX) is a combinational circuit that selects one input from multiple input lines and transfers it to a single output line. The selection of the input line is controlled by select lines.
If a multiplexer has, N select lines, then each select line can have two possible values (0 or 1). Therefore, total possible input combinations become M=2^N.

• M is number of input lines.
• N is number of select lines.

Option A

A half-adder is a basic digital circuit used to add two single-bit binary numbers. It produces two outputs:

• Sum, the result of adding the two input bits.
• Carry, the value that is carried to the next higher bit position if both input bits are 1.

Option D

A Multiplexer (MUX) is a combinational circuit that selects one of several input lines and sends the selected input to a single output line.
Multiplexers are widely used in digital circuits because they can implement logic functions with relatively few components.
Statement I: Logic design is simplified. (TRUE)
A multiplexer can be used to implement many Boolean functions directly, which can reduce the complexity of the logic circuit.
Statement II: Minimizes IC package count. (TRUE)
Since a single multiplexer can replace several individual logic gates, fewer IC packages may be required to implement a circuit.
Statement III: Simplification of logic expression is not required. (TRUE)
A Boolean function can often be implemented directly using a multiplexer by connecting its inputs appropriately according to the truth table. Therefore, it may not be necessary to simplify the Boolean expression using Boolean algebra or K-map.

Option A

A Demultiplexer (DEMUX) is a combinational circuit that takes one input and directs it to one of several output lines based on the values of the select lines.
If a demultiplexer has m select lines, each select line can have two possible values, 0 or 1. Therefore, m select lines can produce 2^m different combinations. Each combination selects one output line. Hence, the number of output lines n is 2^m.

Therefore, n=2^m.

Option C

A Decoder is a combination logic circuit which is similar to demultiplexer but without any data input and used for data decoding.
A 2-to-4 decoder with an enable input has two selection inputs, say A and B, and one enable input E. When the decoder is enabled, exactly one of the four outputs becomes active according to the combination of A and B.

Truth Table:

Boolean Expression:
Y₀ = EA’B’
Y₁ = EA’B
Y₂ = EAB’
Y₃ = EAB
To implement these using NOR gates, the required complemented signals are generated first. The four output functions can then be realized using NOR gates. With the standard multi-input NOR-gate implementation, the minimum required number is 7 NOR Gates.

Gate Count: